Small Size |
Low Power, Simple to use |
||
Buffalo Monitor and Basic11 Interpreter |
CPU_3A FAQ |
||
Create powerfull HC11 applications without expensive development tools |
|||
CPU_3A* Info - Connections
- |
|||
The battery shown is an optional extra. The battery is not supplied as standard.
The module can be supplied with or without the header
pins installed.
Think of it as a single chip processor. It's well suited to classroom and hobby use because of the large amount of RAM for a low cost unit. This allows code to be developed and tested on a very short cycle. Code then load and test, and back to the code is very quick. Once the code is working in RAM it can be converted to run from Flash memory. A FEW DETAILSINTRODUCTION The CPU_3A is a small general purpose processor module based on the popular Motorola 68HC11 microcontroller. It's designed to be mounted on another circuit board. This board provides power and interfacing to the real world. The HC11 has a good assortment of built in I/O, including SCI and SPI communications ports, 8 bit analog to digital conversion, a versatile timer system and digital I/O lines. The majority of these are accessible on the CPU_3A. The HC11 is operated in expanded mode. This mode uses some of the digital I/O lines to interface to the on-board RAM and Flash memory. The CPU data bus, part of the address bus and a CPU generated chip select line are available on the header connector. This allows additional I/O and interface devices to be connected to the CPU. 512K bytes of Flash memory and 128K bytes or RAM provide program and variable storage. The Flash and RAM can be used for data logging. Flash and RAM memory are accessed as banks of 64K/32K bytes. The on-board RAM and real-time-clock can be battery backed protecting time, date and data from power failure. Jumpers allow the HC11 boot loader to be used to initialise the CPU and memory and to load program code into Flash RAM and the CPU EEPROM memory. The module can then be restarted and operated normally. There are various utilities that allow Motorola S19 files to be loaded into RAM from a PC and executed. PROGRAM DEVELOPMENT The CPU_3A can be used without the need for expensive development tools. An assembler such as AS11 available free from Motorola, or a compiler will produce an S19 output file that can be transferred to the CPU_3A using the provided loader utility. The loader can automatically run the downloaded program. Using AS11 or MiniIDE you can develop and test your own applications in HC11 assembly language. This is not as difficult as you may have heard. The CPU_3A allows you to quickly load and test your program in RAM. This is quicker than loading the Flash memory repeatedly. Once the program is ready it can be re-assembled and loaded into Flash memory where it will stay. There are a number of suppliers of commercial assemblers, compilers, simulators and emulators. Many of these are suitable for large project development, but not cost effective for small projects or for hobby or classroom experimentation. BUFFALO & BASIC 11 The Buffalo monitor is a very usefull development tool which allows program code being developed, to be loaded into RAM and tested. The results can be checked, the code modified and another test done. Buffalo makes this process quite simple and relatively quick. Basic11 is a simple but powerfull Basic language interpreter that resides in Flash memory on the CPU_3A board. Using a communications program (like HyperTerminal) connected to the CPU_3A board, the Basic program is written and tested. When complete, the program can be saved to Flash memory. The board is then able to automatically run the basic program whenever power is applied. FEATURES
OPTIONAL BATTERY BACKUP The CPU_3A supports RTC and RAM battery backup. The battery connections are above and below the Flash memory chip. This allows a suitable battery to be soldered directly into position. The battery can be any suitable standard lithium, rechargable lithium or nicad, 3V battery. Alternatively, an external 3V battery can be wired via the expansion header and a simple charge control circuit. Because the battery is a significant cost and not required in many applications, it is not supplied as standard with the CPU_3A. KBD,I/O EXPANSION HEADER This 5-pin header is intended to be used to provide a serial I/O expansion interface. It is compatible with a number of other PMB expansion modules. It can also be used to connect a standard PC keyboard with a suitable connector. This is a software driven interface. TO MAKE IT GO To make the CPU_3A operational you need a 10 to 15 volt regulated power supply and an RS-232 interface. PMB can supply details if required. A PC with a serial port is connected to the CPU_3A. A download utility is then able to initalise the CPU_3A and send your program code through to RAM or Flash memory. Each CPU_3A module is supplied with the Buffalo monitor preloaded into flash memory and tested.
CAUTION CPU_3A* I/O connections are rated at 5 volts. Only the input power supply is able to withstand a higher voltage, and then not more than 15VDC. I/O connections will be damaged if more than 5 Volts is applied.
The Development board (below)
provides protection for the CPU_3A. The development board (EVB_3A see below) does provide signal conditioning and protection to the CPU_3A. The development board is recommended for development and experimentation. |
The following table shows the function assigned to each of the 57 connector pins. If you are not familiar with the HC11, the manual or data sheet will be required to sort out some of the meaning. |
Left End Header (next to CPU) Power in and CPU I/O |
||||
1 |
PE7 |
direct connect |
analog input |
. |
2 |
PE3 |
direct connect |
analog input |
. |
3 |
PE6 |
direct connect |
analog input |
. |
4 |
PE2 |
direct connect |
analog input |
. |
5 |
PE5 |
direct connect |
analog input |
. |
6 |
PE1 |
direct connect |
analog input |
. |
7 |
PE4 |
direct connect |
analog input |
. |
8 |
PE8 |
direct connect |
analog input |
. |
9 |
XIRQ |
direct connect |
input |
non-maskable interrupt |
10 |
IRQ |
direct connect |
input |
interrupt, shared with kbd,i/o port |
11 |
PA0 |
direct connect |
digital I/O |
. |
12 |
PA1 |
direct connect |
digital I/O |
. |
13 |
PA2 |
direct connect |
digital I/O |
. |
14 |
PA3 |
direct connect |
digital I/O |
. |
15 |
PA4 |
direct connect |
digital I/O |
. |
16 |
PA5 |
direct connect |
digital I/O |
. |
17 |
PA6 |
direct connect |
digital I/O |
. |
18 |
PA7 |
direct connect |
digital I/O |
. |
19 |
PD4 |
direct connect |
digital I/O |
. |
20 |
PD5 |
direct connect |
digital I/O |
. |
21 |
PD2 |
direct connect |
digital I/O |
. |
22 |
PD3 |
direct connect |
digital I/O |
. |
23 |
PD0 |
direct connect |
RXD |
SCI, serial port |
24 |
PD1 |
direct connect |
TXD |
SCI, serial port |
25 |
+V |
power supply |
. |
+10 to +15 volts DC (main supply) |
26 |
COM |
power supply |
. |
common |
Right End Header (next to reset button) System Expansion and control signals |
||||
1 |
+5V |
supply out |
. |
maximum load = 75mA |
2 |
COM |
power supply |
. |
common |
3 |
RST |
reset |
reset |
. |
4 |
A10 |
direct connect |
address bus |
. |
5 |
A9 |
direct connect |
address bus |
. |
6 |
A8 |
direct connect |
address bus |
. |
7 |
A7 |
direct connect |
address bus |
. |
8 |
A6 |
direct connect |
address bus |
. |
9 |
A5 |
direct connect |
address bus |
. |
10 |
A4 |
direct connect |
address bus |
. |
11 |
A3 |
direct connect |
address bus |
. |
12 |
A2 |
direct connect |
address bus |
. |
13 |
A1 |
direct connect |
address bus |
. |
14 |
A0 |
direct connect |
address bus |
. |
15 |
CE |
chip enable |
. |
. |
16 |
VBAT |
. |
. |
memory backup battery |
17 |
E |
E clock |
control signal |
. |
18 |
R/W |
read/write |
control signal |
. |
19 |
D0 |
direct connect |
data bus |
. |
20 |
D2 |
direct connect |
data bus |
. |
21 |
D3 |
direct connect |
data bus |
. |
22 |
D4 |
direct connect |
data bus |
. |
23 |
D5 |
direct connect |
data bus |
. |
24 |
D1 |
direct connect |
data bus |
. |
25 |
D7 |
via 1K resistor |
data bus |
. |
26 |
D6 |
direct connect |
data bus |
. |
KBD,I/O Header (next to CPU) Serial I/O expansion |
||||
1 |
+5V |
supply out |
. |
max load = 50mA |
2 |
COM |
power supply |
. |
common |
3 |
DAT |
via 470R resistor |
exp data |
to CPU IRQ |
4 |
CLK |
via 470R resistor |
exp clock |
to CPU PG2 (shared with RTC) |
5 |
IRQ |
via 470R resistor |
exp interrupt |
to CPU PG3 |
. |
. |
. |
. |
. |
example of vertical mounting |
rear view |
Prices shown are in New Zealand Dollars and
exclude GST.
Sales outside of New Zealand prices will be charged at the current
exchange rate
GST is only charged on sales within New Zealand
assembled modules |
package |
part number |
1 to 11 |
12 to 48 |
49 up |
CPU_3A module only, |
- |
YTMGPC3AM |
|
|
|
CPU_3A + Development Bd |
EVB_5A1 |
YTMGPC3AP |
|
|
|
Note: The CPU_3A is not supplied as a bare PCB or kit.
Files available for Download |
||
Code Examples (zip) |
Reset/Boot Operation (pdf) |
|
Basic11 Interpreter |
DEVELOPMENT BOARD
Note - We've updated the Development Board The EVB_3A board supports the CPU_3A module for development, experimentation and programming.
|
|
|
|
FEATURES
The development board is supplied less power source, serial cable and CPU_3A module. To make use of the board, a 12V DC plug-pack or bench supply, 9 pin male to PC serial cable and a CPU_3A module will be required. |
Prices shown are in New Zealand Dollars and
exclude GST.
Sales outside of New Zealand prices will be charged at the current
exchange rate
GST is only charged on sales within New Zealand
assembled modules |
package |
part number |
1 to 11 |
12 to 48 |
49 up |
STD Development board only, |
EVB_5A1 |
YMEVB5A1DB |
|
|
|
CPU_3A* + Development Bd |
EVB_5A1 |
YTMGPC3AP |
|
|
|
Normally available ex-stock for immediate shipping.
Note: The Development-Board is not supplied as a bare PCB or kit.
Files available for Download |
||
Circuit Diagram (pdf) updated |
Operating Instructions (pdf) |
. |
. |
NOTES:
|
last updated: 06 May 2009 |